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    Introduction of electronic components and circuit assembly technology (1)

    Electronic components are the cells of electronic information devices, and board-level circuit assembly technology is the basis for manufacturing electronic devices. The emergence of different types of electronic components has always led to a revolution in board-level circuit assembly technology. Through-hole insertion technology (THT), which appeared at the same time as the rise of integrated circuits in the 1960s, was replaced by the first-generation SMT debuted in the 1980s with the booming LSI in the latter half of the 1970s. The peripheral terminal package represented by QFP It has become the mainstream packaging of today; in the 1990s, with the narrow spacing of QFP, board-level circuit assembly technology is facing challenges. Despite the development of the fine pitch assembly technology (FPT), there are still many board-level circuit assemblies with a pitch of less than 0.4 mm. The process is facing a solution. As the most ideal solution in the first half of the 1990s, the United States proposed the second package assembly technology of the IC package side array package (BGA), and its next small package is the chip size package (CSP) was in the 1990s. It has not become the focus of attention. For example, a Q-pin package of more than 400 pins that is difficult to assemble and assemble is replaced by PBGA and TBGA with easy-to-assemble terminal spacing of 1.0-1.5 mm, achieving group reflow of such devices. In particular, flip-chip connection technology is used in the connection between the chip and the package substrate, so that thousands of pins of PCBA are used in supercomputers and workstations, called FCBGA, and are beginning to be put into practical use. The third representative surface assembly technology is directly chip-level assembly, but due to reliability, cost and KGD constraints, only in special fields, further development of IC packaging, chip-wrapped wafer package (WLP) surface array bump type at the end of 1999 In 2014, FC is expected to become the third representative package for the multi-needle and high-performance requirements of semiconductor devices.

    IC packaging has lagged behind the inherent capabilities of IC chips. We hope that the performance gap between the bare chip and the packaged chip will be reduced, which will promote the development of new designs and new packaging technologies. In the new package design, the multi-chip package (CSP) contains more than one chip, stacked on top of each other, through wire bonding and flip chip design (on-chip soldering on flip-chip, flip-chip on-line soldering, Or wire bonding wire bonding) to achieve inter-chip interconnection, further reducing the weight and space occupied by the device.

    Due to size and cost advantages, wafer-level CSP (Wafer-level cap) will be further developed to form first-level interconnect and package I/O terminals on the chip before the wafer is cut into small blocks (chips). This not only shortens the manufacturing cycle, but also has I/O terminals divided into surface array type and peripheral type (depending on the distribution of I/O terminals); the former, the EIAJ has a terminal pitch of 0.8 mm or less, and the external size is 4 mm- The 21mm ultra-small package is standard, mainly for logic and memory devices. The latter is a leadless miniaturized package with peripheral terminals such as SON and QFN, which is mainly suitable for memory and low-level logic devices. Since the advent of the CSP in the early 1990s, various structural forms have been proposed. The FBGA with face array type is now the mainstream. The first generation FBGA is a plastic type face down type. The second generation FBGA is a carrier type. The face-down type uses lead frame plastic modules and packages, and the new generation FBGA uses crystal as the carrier for transmission, and the final assembly process of cutting (dashing), that is, WLP method, replaces the connection technology used in the previous package. (Wire welding, TAB, and flip chip bonding), but before the scribe line separation, the wiring technology of the pre-semiconductor process is used to connect the chip pad to the external terminal, and the solder ball connection and electrical test are followed. The wafer state is completed, and finally the line division is forced. Obviously, the FBGA of the actual chip size is made by the WLP method, and the appearance is indistinguishable from the FC.

    In short, PBGA, TBGA, FBGA, (CSP) and FC are the current trends in IC packaging. Tables 1 and 2 show the development trends of these packages, respectively. In the first 15 years of the 21st century, the third representative package will be rapidly developed. Around high-density assembly, the diversity of package structure will be the most prominent feature of IC packaging in the early 21st century. LSI chip stack package, ring package: In addition, there will be a new 3D package, optical-electronic interconnection, light surface assembly technology will also flourish. System-on-a-chip (SOC) and MCM system-in-package (MCM/SIP) will be further developed and put into practical use with improved design tools, increased wiring density, adoption of new substrate materials, and economical KGD supply. stage.

    Passive package

    With the demand for miniaturization, high performance, high reliability, safety and electromagnetic compatibility of electronic equipment in the industrial and consumer electronics markets, new demands are placed on the performance of electronic circuits, since the 1990s, The components are further developed in the direction of miniaturization, multi-layering, large capacity, high voltage resistance and high performance. At the same time, with the popularization and application of SMT in all electronic devices, the use of chip components worldwide has increased rapidly. The number of components reaches 1 megabit, and the ratio of passive components to IC is generally greater than 20. Since such a large number of discrete components are required, the discrete components dominate the size of the final PCB component; in addition, the increase in the amount of chip passive components enables placement. The bottleneck in the process is more difficult to solve by the placement of chip components, resulting in a loss of balance in the production line, a decrease in equipment utilization rate, and an increase in cost. At the same time, the supply time of the chip components occupies 30% of the production line time, which seriously affects the increase in production volume. An effective way to solve these problems is. Achieve the integration of passive components.

    The integrated passive components are available in the following packages:

    Array: integrates many types of passive components together and encapsulates them in the form of planar array terminals;

    Network: integrates many hybrid resistors and capacitors and encapsulates them in the form of peripheral terminals;

    Hybrid: a mixture of some passive components and active devices for packaging;

    Embedding: embedding passive components in a PCB or other substrate;

    Integrated Hybrid: The integrated passive components are packaged in QFP or TSOP format.

    The popularization and application of these passive packages can effectively solve the placement: bottleneck, improve the balance of SMT production line, reduce the cost, increase the output, and increase the assembly density.

    Development of advanced board level circuit assembly technology

    The development of circuit assembly technology is largely restricted by the assembly process. If there is no advanced assembly process, advanced packaging is difficult to promote and apply, so the emergence of advanced packaging will inevitably put new requirements on the assembly process. In general, BGA, CSP, and MCM can be assembled using standard surface mount equipment processes. However, due to the miniaturization of the package terminal surface array, stricter requirements are imposed on the assembly process, thereby facilitating SMT assembly equipment and processes. development of.

    女人天堂AV在线

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